IDAC使用参考

REVISION HISTORY

Revision No.
Description
 Date
1.0
  • Initial release
    		•  07/01/2024

    1. 使用说明

    1.1. Configure Power Scheme Settings

    IDAC driver controlls SoC supply powers with flexible configuration per customer's power scheme requirement. Power scheme can be confgured by the following U-Boot ENV item.

    U-Boot ENV Item Value Description
    overdrive 0 Low Drive (LD)
    overdrive 1 None Overdrive (NOD)
    overdrive 2 Overdrive (OD)
    overdrive 3 Turn Off IDAC Voltage Control

    2. Register Table

    2.1. PMSAR Register (Bank = 14)

    Index (Absolute) Mnemonic Bit Description
    61h (14C2h) REG14C2 6:0 Default: 0x50 Access: R/W
    SW_CURRENT_2 4:0 IDAC current setting.
    CURRENT_MODE_2 5 set: 0.5uA.
    clear: 1uA
    SW_MODE_2 6 current_trim sw mode
    set: Enable.
    clear: Disable
    71h (14E2h) REG14E2 6:0 Default: 0x50 Access: R/W
    SW_CURRENT 4:0 IDAC current setting.
    CURRENT_MODE 5 set: 0.5uA.
    clear: 1uA
    SW_MODE 6 current_trim sw mode
    set: Enable.
    clear: Disable
    73h (14E6h) REG14E6 0:0 Default: 0x0 Access: R/W
    EN_IDAC_CP 0:0 Enable IDAC.
    set: Enable.
    clear: Disable

    2.2. PMSAR1 Register (Bank = 15)

    Index (Absolute) Mnemonic Bit Description
    01h (1502h) REG1502 6:0 Default: 0x50 Access: R/W
    SW_CURRENT_3 4:0 IDAC current setting.
    CURRENT_MODE_3 5 set: 0.5uA.
    clear: 1uA
    SW_MODE_3 6 current_trim sw mode
    set: Enable.
    clear: Disable
    11h (1522h) REG1522 6:0 Default: 0x50 Access: R/W
    SW_CURRENT 4:0 IDAC current setting.
    CURRENT_MODE 5 set: 0.5uA.
    clear: 1uA
    SW_MODE 6 current_trim sw mode
    set: Enable.
    clear: Disable